This invention relates to a method and apparatus for calibrating interleaved digitizers.
Interleaved digitizers contain two or more analog to digital ("A/D") converters that are strobed by clock signals that are phase shifted copies of a master clock signal In this way the digitizer samples an analog input signal two or more times per cycle, thus increasing the effective sample rate of the digitizer. However, the digitizer must be calibrated in order that the input is sampled at equal time intervals and not time skewed due to errors in the clock generator circuit or other phase and delay errors in the digitizer system.
Prior art calibration techniques involve elaborate procedures or precision ramp generators. What is desired is a calibration method and apparatus that is simple and easy to implement.